We Did Basic Math on a Quantum Computer. Here Are the Results.

Can a quantum computer add 2+3? The honest answer: yes, but a pocket calculator does it better. The interesting answer: watching how a quantum chip fails at arithmetic tells you almost everything about its capabilities and limits.

We ran six experiments on Quantum Inspire’s Tuna-9 — a 9-qubit superconducting processor built by QuTech at TU Delft. Each experiment was designed in native gates (CZ, Ry, Rz), emulator-verified to 100% correctness, and submitted to real hardware. Every single one returned the correct answer as the most common measurement outcome.

The Scorecard

Experiment	Operation	CZ gates	Qubits	Fidelity
GHZ entanglement	|000⟩ + |111⟩	2	3	85.5%
Grover’s search	find 3 in {0,1,2,3}	2	3	81.6%
2+3=5	2-bit addition	9	7	70.8%
3×2=6	2-bit multiply	6	5	62.9%
5+3=8	3-bit addition	9	7	46.7%
9+7=16	4-bit addition	12	9	36.7%

The trend is stark: fidelity drops as circuit depth increases, exactly as gate-error theory predicts. Each CZ gate on Tuna-9 has ~6–7% error. A 2-CZ circuit retains most of its signal. A 12-CZ circuit compounds those errors across every gate.

The Circuits

Every circuit had to be hand-routed onto Tuna-9’s physical topology. The chip’s connectivity graph is bipartite — no triangles, no odd cycles — which means a Toffoli gate (the quantum AND gate, needed for carry logic) can never have all three qubits directly connected. We used two tricks to work around this:

1. Relative-phase Toffoli — decomposes a Toffoli into 3 CZ gates instead of the textbook 6, by accepting a harmless −1 phase on one computational basis state. This only works for classical logic (inputs are |0⟩ or |1⟩, never superpositions).
2. Bridge CNOTs — routes a CNOT between non-adjacent qubits by bouncing through a clean |0⟩ ancilla: CNOT(a,bridge); CNOT(bridge,target); CNOT(a,bridge). Costs 4 extra CZ gates but preserves the computation.

2+3=5 (2-bit ripple-carry adder)

Binary: 10 + 11 = 101. One Toffoli for the carry (AND of the two high bits), one CNOT for the sum (XOR). The carry Toffoli targets q[4], which connects directly to both inputs q[2] and q[6] — no routing needed. The sum XOR required a bridge through q[5] and q[7] to reach q[8].

9 CZ gates. Hardware result: 725/1024 shots correct (70.8%).

5+3=8 (3-bit ripple-carry adder)

Binary: 101 + 011 = 1000. Three cascading Toffoli gates forming the carry chain q[4]→q[6]→q[8]. Key discovery: this carry chain maps perfectly onto Tuna-9’s topology with zero routing overhead. Each Toffoli target sits at a node connected to both its controls.

9 CZ gates. Hardware result: 478/1024 correct (46.7%). Lower fidelity than 2+3 despite the same CZ count, because 3-bit uses more qubits (more readout error) and the carry chain has deeper sequential dependence.

9+7=16 (4-bit ripple-carry adder)

Binary: 1001 + 0111 = 10000. Four cascading Toffoli gates across all 9 qubits. The carry chain q[2]→q[4]→q[6]→q[8] runs the full length of the chip. Every qubit is active — no spectators.

12 CZ gates. Hardware result: 376/1024 correct (36.7%). The correct answer “all ones” is still the single most common outcome, but noise spreads 63% of probability across 80+ other bitstrings. This is the practical limit of deterministic computation on Tuna-9.

4-bit adder qubit mapping

Logical role	Physical qubit	Error rate
a0 (input)	q5	1.6%
b0 (input)	q0	12.3%
carry0	q2	1.6%
b1 (input)	q1	3.7%
carry1	q4	1.9%
b2 (input)	q3	5.2%
carry2	q6	2.7%
a3 (input)	q7	4.5%
carry3 (overflow)	q8	3.5%

Note: q0 (12.3% error) is forced into the mapping because all 9 qubits are needed. Its high single-qubit error rate contributes disproportionately to the overall noise.

3×2=6 (2-bit multiplier)

Binary: 11 × 10 = 110. Multiplication is just addition of partial products, where each partial product is a Toffoli (AND) gate. Two Toffoli gates produce p1 = a0·b1 and p2 = a1·b1 (the p0 = a0·b0 term is zero since b0=0).

6 CZ gates. Hardware result: 644/1024 correct (62.9%).

Grover’s Search: Genuine Quantum Advantage

The arithmetic circuits above are classical computations squeezed through quantum gates — a pocket calculator does them faster. Grover’s algorithm is different: it provides a provable quadratic speedup over any classical algorithm for unstructured search.

Setup: we have a “black box” function that returns 1 for exactly one input (the number 3) and 0 for everything else. Classically, finding which input returns 1 requires checking items one by one — on average 2 guesses out of 4 possibilities. Grover’s algorithm finds it in a single query with high probability.

The circuit: put two qubits in superposition (H gates), apply the oracle (CZ marks the |11⟩ state), apply the diffusion operator (reflect about the mean). After one Grover iteration, the |11⟩ state has probability ~1.0.

2 CZ gates. Hardware result: 836/1024 correct (81.6%).

We used a 2-qubit version because 3-qubit Grover requires a true Toffoli gate (the relative-phase trick doesn’t work when qubits are in superposition). On Tuna-9’s bipartite topology, a true Toffoli needs 6+ CZ gates with ancilla routing, which would push the circuit into the noise-dominated regime.

GHZ State: The Entanglement Test

The GHZ (Greenberger–Horne–Zeilinger) state is the simplest demonstration of genuine 3-party entanglement: an equal superposition of all-zeros and all-ones that cannot be decomposed into separate qubit states. Measuring any single qubit collapses the other two instantly.

The circuit: H gate on q[2], then CNOT to q[4], then CNOT to q[6]. Two CZ gates total.

Hardware result: 470 shots “000” + 406 shots “111” = 85.5% fidelity. The 14.5% noise leaks into nearby states (single bit-flips), consistent with readout errors on the individual qubits.

Fidelity vs. Circuit Depth

Plotting fidelity against CZ gate count reveals a clean exponential decay:

CZ gates	Experiment	Fidelity	Predicted (93.5%n)
2	GHZ	85.5%	87.4%
2	Grover	81.6%	87.4%
6	3×2=6	62.9%	66.8%
9	2+3=5	70.8%	55.4%
9	5+3=8	46.7%	55.4%
12	9+7=16	36.7%	45.9%

The “predicted” column assumes each CZ gate has 93.5% fidelity (the best Bell pair measurement on Tuna-9, from the q4-q6 pair). Real fidelity varies per qubit pair, and readout errors stack on top — but the exponential envelope fits remarkably well. Roughly: every 3 additional CZ gates halves your signal.

What This Means

None of these computations are useful — a classical computer can add 9+7 in a nanosecond. The point is calibration and characterization:

1. Deterministic circuits are perfect benchmarks. We know the exact correct answer, so hardware fidelity is unambiguous. VQE energies have statistical uncertainty; 2+3 is either 5 or it isn’t.
2. Tuna-9 is reliable up to ~6 CZ gates. Circuits with ≤6 entangling gates return the correct answer >60% of the time. Past 9 gates, you’re in the noise-dominated regime where the correct answer is still the mode but not the majority.
3. Grover’s algorithm works on real hardware. Even on a noisy 9-qubit chip, a 2-qubit Grover search finds the marked item with 81.6% probability. The oracle-diffusion pattern transfers cleanly from textbook to silicon.
4. Topology matters as much as gate count. The 3-bit adder maps perfectly onto Tuna-9’s carry chain (q4→q6→q8) with zero routing overhead. The 2-bit adder needs bridge CNOTs. Good qubit mapping is free performance.

Next: we’re using these fidelity numbers to inform VQE circuit design. If a VQE ansatz needs 12 CZ gates, we already know the raw fidelity floor is ~37%. That tells us exactly how much error mitigation budget we need before the experiment is worth running.

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All circuits were designed, emulator-verified, and submitted to hardware by Claude Code using MCP quantum servers. Native gate decompositions, qubit routing, and topology mapping were computed automatically from Tuna-9’s connectivity graph. No manual QASM writing.